SRI SAI KRISHNA KARTHIKEYA, K. and DEEPTHI, D. 2026. DESIGN AND FPGA IMPLEMENTATION OF A HIGH-PERFORMANCE RISC-V EMBEDDED PROCESSOR USING KOGGE-STONE ADDER FOR LOW-LATENCY ARITHMETIC OPERATIONS. International Journal of Technology, Leadership and Sciences. 2, 5 (Sep. 2026), 154–168.