SRI SAI KRISHNA KARTHIKEYA K, DEEPTHI D. DESIGN AND FPGA IMPLEMENTATION OF A HIGH-PERFORMANCE RISC-V EMBEDDED PROCESSOR USING KOGGE-STONE ADDER FOR LOW-LATENCY ARITHMETIC OPERATIONS. IJTLS. 2026;2(5):154-168. Accessed October 5, 2026. https://ijtls.com/index.php/files/article/view/94