SRI SAI KRISHNA KARTHIKEYA, KOPPISETTI; DEEPTHI, Dr.E. DESIGN AND FPGA IMPLEMENTATION OF A HIGH-PERFORMANCE RISC-V EMBEDDED PROCESSOR USING KOGGE-STONE ADDER FOR LOW-LATENCY ARITHMETIC OPERATIONS. International Journal of Technology, Leadership and Sciences, [S. l.], v. 2, n. 5, p. 154–168, 2026. Disponível em: https://ijtls.com/index.php/files/article/view/94. Acesso em: 5 oct. 2026.