SRI SAI KRISHNA KARTHIKEYA, KOPPISETTI, and Dr.E DEEPTHI. “DESIGN AND FPGA IMPLEMENTATION OF A HIGH-PERFORMANCE RISC-V EMBEDDED PROCESSOR USING KOGGE-STONE ADDER FOR LOW-LATENCY ARITHMETIC OPERATIONS”. International Journal of Technology, Leadership and Sciences, vol. 2, no. 5, Sept. 2026, pp. 154-68, https://ijtls.com/index.php/files/article/view/94.