SRI SAI KRISHNA KARTHIKEYA K, DEEPTHI D. DESIGN AND FPGA IMPLEMENTATION OF A HIGH-PERFORMANCE RISC-V EMBEDDED PROCESSOR USING KOGGE-STONE ADDER FOR LOW-LATENCY ARITHMETIC OPERATIONS. IJTLS [Internet]. 2026 Sep. 30 [cited 2026 Oct. 5];2(5):154-68. Available from: https://ijtls.com/index.php/files/article/view/94